A bus, in computing, is a set of physical connections (cables, printed circuits, etc.) which can be shared by multiple hardware components in order to communicate with one another.
The purpose of buses is to reduce the number of "pathways" needed for communication between the components, by carrying out all communications over a single data channel. This is why the metaphor of a "data highway" is sometimes used.
| Basically, it's the conduit used by your entire system to communicate with the CPU. A bus is a collection of wires and connectors through which the data is transmitted. When used in reference to personal computers, the term bus usually refers to what is commonly called the local bus (on older systems) or system bus (on newer systems). This bus is considered the first bus on the electronic highway and it connects the CPU to the main memory (RAM) on the motherboard. All buses consist of two parts -- an address bus and a data bus. The data bus transfers actual data whereas the address bus transfers information about the data and where it should go. The address bus is used to identify particular locations (addresses) in main memory. The width of the address bus (that is, the number of wires) determines how many unique memory locations can be addressed. Modern PCs and Macs have as many as 36 address lines, which enables them theoretically to access 64 GB of main memory. However, the actual amount of memory that can be accessed is usually much less than this theoretical limit due to chipset and motherboard limitations. The size of a bus, known as its width, is important because it determines how much data can be transmitted at one time. The bus size actually indicates the number of wires in the bus. For example, a 32-bit bus has 32 wires or connectors that transmit 32 bits simultaneously (referred to as in parallel). It would be considered "32-bits wide." A 16-bit bus has 16 wires or connectors that can transmit 16 bits of data in parallel. You would say it is "16-bits wide." |
In reality, each bus is generally constituted of 50 to 100 distinct physical lines, divided into three subassemblies:- The address bus (sometimes called the memory bus) transports memory addresses which the processor wants to access in order to read or write data. It is a unidirectional bus.
- The data bus transfers instructions coming from or going to the processor. It is a bidirectional bus.
- The control bus (or command bus) transports orders and synchonisation signals coming from the control unit and travelling to all other hardware components. It is a bidirectional bus, as it also transmits response signals from the hardware.
The chipset
A chipset is the component which routes data between the computer's buses, so that all the components which make up the computer can communicate with each other. The chipset originally was made up of a large number of electronic chips, hence the name. It generally has two components:- The NorthBridge (also called the memory controller) is in charge of controlling transfers between the processor and the RAM, which is way it is located physically near the processor. It is sometimes called the GMCH, forr Graphic and Memory Controller Hub.
- The SouthBridge (also called the input/output controller or expansion controller) handles communications between peripheral devices. It is also called the ICH (I/O Controller Hub). The tembridge is generally used to designate a component which connects two buses.
It is interesting to note that, in order to communicate, two buses must have the same width. The explains why RAM modules sometimes have to be installed in pairs (for example, early Pentium chips, whose processor buses were 64-bit, required two memory modules each 32 bits wide).
The chipset
A chipset is the component which routes data between the computer's buses, so that all the components which make up the computer can communicate with each other. The chipset originally was made up of a large number of electronic chips, hence the name. It generally has two components:
- The NorthBridge (also called the memory controller) is in charge of controlling transfers between the processor and the RAM, which is way it is located physically near the processor. It is sometimes called the GMCH, forr Graphic and Memory Controller Hub.
- The SouthBridge (also called the input/output controller or expansion controller) handles communications between peripheral devices. It is also called the ICH (I/O Controller Hub). The tembridge is generally used to designate a component which connects two buses.
It is interesting to note that, in order to communicate, two buses must have the same width. The explains why RAM modules sometimes have to be installed in pairs (for example, early Pentium chips, whose processor buses were 64-bit, required two memory modules each 32 bits wide).
System Bus & I/O Bus
On older computers, the local bus, which was the only bus, was used for the CPU, RAM and I/O (input/output) components. All components on the local bus used the same clock speed. In the late 80s we saw the separation of the system bus from the I/O bus allowing them to run at different speeds.
The system bus (also called the frontside bus, memory bus, local bus or host bus) is what connects the CPU to main memory on the motherboard. I/O buses are those that connect the CPU and RAM with all other components, and the I/O buses branch off of the system bus. I/O buses operate on a speed which is lower than the system bus speed. PCs offer several types of I/O buses which include the ISA bus, PCI bus, AGP bus and USB bus.
ISA Bus & PCI Bus
Short for Industry Standard Architecture bus, the ISA bus architecture was used in the IBM PC/XT and PC/AT. The AT version of the bus is called the AT bus and became a de facto industry standard. Starting in the early 90s, ISA began to be replaced by the PCI (Peripheral Component Interconnect) local bus architecture. The PCI standard was developed by Intel Corp. On modern PCs, the PCI bus is the central (or main) I/O bus. It's used for connecting adapters such as hard disks, sound cards, network cards and graphics cards (although now AGP is more common for 3-D graphics). PCI is a 64-bit bus, though it is usually implemented as a 32-bit bus, and it can run at clock speeds of 33 or 66 MHz. At 32-bits and 33 MHz, it yields a throughput rate of 133 MBps (at 66 MHz 266 MBps). The vast majority of today's PCs implement a PCI bus that runs at a maximum speed of 33 MHz.PCI 2.1
Also called PCI-X 2.0, the PCI bus specification version 2.1 calls for expandability to 64-bits and 66 MHz speed, yielding a throughput rate of 532 MBps.AGP Bus
Short for Accelerated Graphics Port, an interface specification developed by Intel Corporation. AGP is based on PCI, but is designed especially for the throughput demands of 3-D graphics. Rather than using the PCI bus for graphics data, AGP introduces a dedicated point-to-point channel so that the graphics controller can directly access main memory. The AGP channel is 32-bits wide and runs at 66 MHz. This translates into a total bandwidth of 266 MBps, as opposed to the PCI bandwidth of 133 MBps. AGP also supports optional faster modes and allows 3-D textures to be stored in main memory rather than video memory.USB Bus
Short for Universal Serial Bus, an external bus standard that supports data transfer rates of 12 Mbps. A single USB port can be used to connect up to 127 peripheral devices, such as mice, modems, and keyboards. USB also supports Plug-and-Play installation and hot plugging.USB 2.0
Also referred to as Hi-Speed USB, USB 2.0 is an external bus that supports data rates up to 480Mbps. USB 2.0 is an extension of USB 1.1. USB 2.0 is fully compatible with USB 1.1 and uses the same cables and connectors.
Bus Speed
Every bus has a clock speed measured in MHz. This measurement represents the speed in which information and data can move across the bus on the motherboard. A fast bus allows data to be transferred faster, which makes applications run faster. Bus speed is one of the factors which determines the speed of your CPU.
Backside Bus
The backside bus is the microprocessor bus that connects the CPU to a Level 2 cache. Typically, a backside bus runs at a faster clock speed than the frontside bus that connects the CPU to main memory. For example, the Pentium Pro microprocessor actually consists of two chips — one contains the CPU and the primary cache, and the second contains the secondary cache. A backside bus connects the two chips at the same clock rate as the CPU itself (at least 200 MHz). In contrast, the frontside bus runs at only a fraction of the CPU clock speed
Characteristics of a bus
A bus is characterised by the amount of information that can be transmitted at once. This amount, expressed in bits, corresponds to the number of physical lines over which data is sent simultaneously. A 32-wire ribbon cable can transmit 32 bits in parallel. The term "width" is used to refer to the number of bits that a bus can transmit at once.
Additionally, the bus speed is also defined by its frequency (expressed in Hertz), the number of data packets sent or received per second. Each time that data is sent or received is called a cycle.
This way, it is possible to find the maximum transfer speed of the bus, the amount of data which it can transport per unit of time, by multiplying its width by its frequency. A bus with a width of 16 bits and a frequency of 133 MHz, therefore, has a transfer speed equal to:
16 * 133.106 = 2128*106 bit/s,or 2128*106/8 = 266*106 bytes/sor 266*106 /1000 = 266*103 KB/sor 259.7*103 /1000 = 266 MB/s
Here is a table which gives the specifications for the most commonly used buses:
Standard Bus width (bits) Bus speed (MHz) Bandwidth (MB/sec)
ISA 8-bit 8 8.3 7.9
ISA 16-bit 16 8.3 15.9
EISA 32 8.3 31.8
VLB 32 33 127.2
PCI 32-bit 32 33 127.2
PCI 64-bit 2.1 64 66 508.6
AGP 32 66 254.3
AGP (x2 Mode) 32 66x2 528
AGP (x4 Mode) 32 66x4 1056
AGP (x8 Mode) 32 66x8 2112
ATA33 16 33 33
ATA100 16 50 100
ATA133 16 66 133
Serial ATA (S-ATA) 1 180
Serial ATA II (S-ATA2) 2 380
USB 1 1.5
USB 2.0 1 60
FireWire 1 100
FireWire 2 1 200
SCSI-1 8 4.77 5
SCSI-2 - Fast 8 10 10
SCSI-2 - Wide 16 10 20
SCSI-2 - Fast Wide 32 bits 32 10 40
SCSI-3 - Ultra 8 20 20
SCSI-3 - Ultra Wide 16 20 40
SCSI-3 - Ultra 2 8 40 40
SCSI-3 - Ultra 2 Wide 16 40 80
SCSI-3 - Ultra 160 (Ultra 3) 16 80 160
SCSI-3 - Ultra 320 (Ultra 4) 16 80 DDR 320
SCSI-3 - Ultra 640 (Ultra 5) 16 80 QDR 640

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